Embedded System Design with Xilinx Zynq FPGA and VIVADO

Embedded System Design with Xilinx Zynq FPGA and VIVADO

Zynq Training with VIVADO Tool: Embedded System Design with Zynq 7000 (Zedboard/Zybo/MicroZed), VIVADO IPI & SDK.

上次更新 8/2020

英语 [自动]

你将会学到的

To Understand and Familiarize VIVADO Design Methodology and Zynq Architecture for FPGA Design.

Rapidly architect an embedded system targeting the ARM processor of Zynq located on ZedBoard using Vivado and IP Integrator

Create Custom AXI-4 Slave Led Controller IP with VIVADO IPI in VHDL.

Software Design for Embedded Application with VIVADO and SDK

To Create a bootable system capable of booting from the SD card and QSPI flash

Debug designs with SDK and Utilize Timer Resources of Processing System.

Design Custom Embedded System with Xilinx Zynq 7000 FPGA with VIVADO in VHDL

Create Designs with VIVADO IPI and Implementing Design in ZedBoard FPGA.

Design with VIVADO HLS and Export C/C++ Design into IP/RTL from HLS

C Language Programming with Xilinx VIVADO SDK

要求

Hardware Description Language -HDL [VHDL/Verilog] basics

Basic FPGA Design Flow

Idea of Xilinx ISE Design Suit ( best if have idea of VIVADO design methodology)

Basic Idea of Embedded Programming with C

No Worries!!! we have introduced all the basics of VIVADO, Verilog/VHDL and Zynq in this Course!

说明

Note: Course is updated with HLS Design Lab & Debugging Sessions.



Embedded System Design with Xilinx VIVADO Design Suit and Zynq FPGA is targeted for Hardware (FPGA) Design and Embedded enthusiast who want to upgrade and enhance their hardware(FPGA) Design Skills with State of Art Design Tools and FPGA from Xilinx. This course cover from Introduction to VIVADO, Intellectual Property (IP), IP Design Methodology, designing basic embedded system with Vivado and SDK, Creating custom AXI-4 Lite Led Controller IP, Programming Processing System (PS) of Zynq (i.e Zedboard) with Embedded Application projects from SDK , Utilizing Timer API and Debugging Features on SDK for Zynq PS, and Creating Boot Image of the Application Project for SD and QSPI flash of Zynq (ZedBoard).



Finally we have included the session on "Embedded Design with VIVADO HLS" this session includes the HLS Design Methodology, Synthesizing HLS C/C++ Project, Generating RTL/HDL from C/C++ and Exporting C/C++ project in to IP-XACT/ Pcore/Sys Gen Format.



So from this course you will able to get design/implementation skills of simple embedded system (Memory Test Application) to complex application design (utilizing Timer, Debugging etc.) and Create Bootable Image file of the application project.For more details please watch the demo video and some Free video of course.



此课程面向哪些人：

Electrical Engineering

Computer Engineering and Computer Science

Electronics Engineering

Embedded System Design Enthusiast and Professionals

Zynq Training Enthusiasts