Learn Vivado from Top to Bottom - Your Complete Guide

Learn Vivado from Top to Bottom - Your Complete Guide

The complete guide for implementing designs on Xilinx FPGAs using Vivado Design Suite, for beginners and advanced users

上次更新 1/2017

英语 [自动]

13 个章节 • 70 个讲座 • 总时长 4 小时 26 分钟

https://www.udemy.com/course/learn-vivado-from-top-to-bottom-your-complete-guide/

你将会学到的

Use Vivado confidently and proficiently.

Understand the steps required to take their FPGA design from start to finish.

Implement a micro blaze softcore processor on their FPGA.

Generate HDL designs from c based code, using Vivado’s high level synthesis tool.

要求

Download and install Xilinx’s Vivado Design Suite, we will cover how to do this is the course if you are unsure of how to do so.

Understand or familiar with what an FPGA is and how they operate.

Interested in FPGA development and design.

说明

The Vivado design suite is the set of tools provided by Xilinx and is used to design, program, and debug Xilinx’s line of FPGAs. This course covers all of the different aspects and capabilities of the Vivado design suite. This course covers everything from the very basics to the more complex topics. This course is designed so that the student who has no experience with Vivado can take the course by starting with the very basics topics such as creating projects and design files. There are also more advanced topics so that the experienced student can learn things like how to create and program a soft core processor using the tools provided by Xilinx. This course covers many topics, including:



Downloading & Installing Vivado (I will be using a Windows machine, however you can install this on a Linux machine as well)

Creating Projects

Simulating Your Hardware Designs

Using Existing IP Cores

Creating & Managing Your Custom IP Cores

Creating and Programming a Micro Blaze soft core processor

Programming your Development Board

Automating Vivado Using Tool Command Line (tcl) Scripts

Creating Your Own Design Constraints

Converting Your C Code to a Hardware Design

Vivado contains many tools and this course will cover all of them, including:



Vivado's Hardware Manager - This is used to load the hardware designs onto the FPGA or on board memory.

Vivado's Simulator - This is what is used to simulate and verify that your design is working as expected.

Integrated Logic Analyzer (ILA)- This is used to act as a virtual oscilloscope while your design is running on the actual hardware target.

Vivado's High Level Synthesis - This tool read C based code and converts it to a HDL based design.

Xilinx's Software Development Kit (SDK) - This is the tool used to write C code that will run on the soft core processor implemented on the FPGA.

This course is laid out in such a way that each section takes on a specific topic or tool associated with Vivado. There are downloadable files that will have the students interact with Vivado so that they can get a hands on learning experience. The students will complete a hardware design project that will take them through all of the design steps neccasary so that they can start implementing their own idea's on Xilinx FPGAs using Vivado Design Suite. Vivado is a very powerful tool that has a lot to offer and this course is designed to help aid you in learning how to use this powerful tool.



此课程面向哪些人：

Anyone who works with Xilinx’s FPGAs.

Anyone who has an interest in understanding the tools used to implement designs on Xilinx FPGAs.

Altera based designers who would like to migrate to Xilinx based designs.

Makers who want to get started with FPGA development.

Students who are taking a course that requires FPGA design or development.